1 Introduction

Figure 1. The ATD radar is located in Norman, Oklahoma. The ATD is a 4-meter, 5,000-element, dual-polarized S-band radar. Its antenna aperture consists of 76 panels, each with 64 elements.

The panel design of the radar in the above figure makes full use of Gen3 ATD Form factor and functional topology of the panel.

Figure 2. Exploded view and photograph of the 64‑element Gen3 panel used in the ATD. The panel employs GaAs‑based T/R modules, with a radiated power of 6 W per polarization direction.

This panel achieves forced-air cooling by channeling airflow through apertures and passages formed by the rear‑plane PCB and the mechanical structure.

This paper describes the development of our PPAR base unit, an 8×8‑element, dual‑polarized phased‑array panel whose scalable digital radiating element architecture can meet the requirements for NMS weather radar systems.

2 Operational Concept

The ability of PPARs to perform rapid, flexible scans is critical to achieving the desired operational outcomes. These capabilities can fundamentally transform the contribution of weather radars to early warning and forecasting. Ground‑to‑storm‑top observations at one‑minute intervals, targeted observations over specific high‑impact areas, and extended dwell times—essential for capturing key aspects of storm evolution—all help improve both the lead time and accuracy of warnings.

A fully digital PPAR architecture optimally supports these capabilities. This architecture can simultaneously form active receive beams, and when combined with an appropriate pulse transmission strategy, The scanning time can be reduced to the number of receive beams.

PPAR design provides support for these. High average transmit power required for scanning the concept . The transmit power must increase proportionally with the number of simultaneous beams to maintain sensitivity.

3 System-Level Overview

The PPAR panel consists of two circuit boards, namely RF aperture plate and Digital Backplane (As shown in Figure 3.) By integrating all necessary radiating elements onto two circuit boards, the total number of boards is reduced, thereby lowering the panel’s cost.

The RF‑aperture PCB incorporates all the RF components required to drive a series of 8×8 stacked patch antennas spaced at 5 cm across the frequency band. Each stacked patch antenna features dual polarization, and each panel can provide Driven by 128 RF channels Each antenna channel is A transmit/receive (T/R) module , which includes a transmit/receive switch, a high-power amplifier, a low-noise amplifier, and a bandpass filter (see Section IV). The T/R module is digitally controlled via a series of connectors that interface with the backplane PCB. In addition, these connectors also incorporate apertures. All RF signal inputs and outputs of the PCB 。

The back-end circuit board (PCB) integrates all power, control logic, and signal-processing functions of a single panel, enabling the panel to operate independently. Each DPPAR panel houses eight identical system-in-package (SiP) modules, referred to as Open RFSoC Hybrid Component (ORCHA) , they constitute the core digital and processing system on each panel. ORCHA is a collaborative effort between MIT Lincoln Laboratory (MIT LL) and Collins Aerospace; these are highly integrated modules that include Xilinx RFSoC as well as all necessary components, such as Memory, power supply and Clock Distribution Network , to ensure normal operation. Each ORCHA controls eight dual-polarized radiating elements on a single panel, and each ORCHA has a total of 16 analog-to-digital converter (ADC) channels and 16 digital-to-analog converter (DAC) channels 。

Figure 3: Diagram of Panel Formwork

Power and essential signals, such as the distributed clock and reset signals, are transmitted via Distributed Signal Bundling (DSB), which is widely used across all panels in the array. This provides a common reference among all panels, enabling the entire… Synchronization of RF Signals in an Array 。

A major challenge in developing all-digital phased-array systems is maintaining stable performance for all ADCs and DACs in the array. (Jitter/Drift) and precise (Anti-aliasing) Reference clock. Poor sampling accuracy in the array can lead to a range of issues, from beam degradation to full‑array failure. At the element level, Xilinx (MTS) synchronization is employed.

MTS provides the capability to achieve synchronization across multiple RFSoCs. , but a distributed clock distribution network must be provided across the entire PRCHA array. This distribution network includes a reference clock and components similar to JESD204B synchronization signal the SYSREF signal. For DPPAR, this signal is referred to as ' Sync As shown in Figure 3, on each panel, two signals arrive via DSB and are distributed to each ORCHA through length-matched PCB traces.

Another important factor for system stability is Temperature . To keep the temperature‑induced phase variations within an acceptable range, the system must maintain a highly uniform temperature gradient of less than 5°C across the entire array. Achieving this requires cooling each panel with a custom‑designed cold plate based on a detailed thermal model of the system (see Figure 4), which can be manufactured using standard commercial fabrication techniques and materials to minimize costs. The cold plates also serve to establish high‑speed array components. Electromagnetic shielding An additional purpose.

As shown in the figure, the cold plate incorporates a large recess that is integrated around the backplane PCB. Together with the cover and gasket, the backplane is fully enclosed in metal. In this way, it is possible to… Mitigate electromagnetic interference that degrades the RF response fidelity of digital systems. 。

Figure 4: Panel cold plate connected to the aperture

4 Radio Frequency System

The block diagram of a single-channel RF link is shown in Figure 5. Signal Processing and Digital-analog domain The previous conversion was performed on the backplane PCB. The RF analog signals underwent minimal amplification and filtering on the backplane before being routed to the aperture PCB via low-cost, high-density RF connectors. On the aperture PCB, the signals are further processed by the T/R module. Adjustment and Zoom in The signal is radiated and received between the stacked patch antenna embedded on the radiating side of the aperture PCB and free space.

One of the most critical components in the RF system chain of a T/R module. It is responsible for high-power transmit amplification, low-noise receive amplification, and duplexing the transmit and receive signals via a shared antenna port.

Figure 5: Block Diagram of the RF Link

High-power RF amplifiers employ Gallium nitride (GaN) The device, while other functions within the module are implemented using several different technologies. The low-noise and driver-stage RF amplifiers employ gallium arsenide (GaAs) monolithic microwave integrated circuits (MMICs). GaAs technology was chosen over GaN, SiGe, or other materials because it offers… Noise figure 、 Linearity and Power efficiency This aspect offers the best cost‑performance ratio for the moderate RF power required by these functions.

Figure 6: T/R module assembly, measuring 1.2 × 0.6 inches (left). Test fixture with two modules mounted for test preparation (right). The center-to-center spacing of the modules in the Y‑direction is 1.00 inch.

Figure 7. Measurement of small-signal gain in receive mode and cross‑channel response of two T/R modules (left).

The device, in receive mode, achieves Small-signal gain of nearly 40 dB and has been implemented in send mode Saturated output power of 45 dBm (approximately 30 W) . In receive mode, the two modules on the test device exhibited Isolation between channels of 50 to 60 dB This meets the requirement of approximately 50 dB isolation between polarizations for weather‑monitoring missions.

This dual‑face DPPAR architecture is regarded as a technology demonstrator, integrating high‑power GaN and cell‑level digitalization as a replacement for the current… The foundation of 150 network radars 。 Fully digitalized The methodology is designed to meet the business‑required 1‑degree beamwidth, and the all‑digital engineering development system can be used to demonstrate a variety of approaches, thereby satisfying the diverse requirements of next‑generation weather radar networks and providing a foundation for exploring the benefits and challenges associated with different potential antenna architectures.

5 Afterword

In this issue, the editor recommends standard 3/6U VPX‑compliant board cards.

3U and 6U VPX‑compliant boards adhere to VITA 46 and other relevant standards. Both feature compact form factors that make them well suited for space‑constrained environments, while their robust expansion capabilities meet the demands of high‑performance computing. Thanks to their exceptional reliability and strong environmental adaptability, they play a critical role across a range of key applications.